DocumentCode
2711076
Title
Development of aspect ratio conversion system using scan-line video processor
Author
Kim, Jeong-Hoon ; Lee, Min Seung ; Park, Se-Woong ; Jeong, Tae-Hong ; Song, Dong-II
Author_Institution
Signal Process. R&D Center, Samsung Electron., Suwon, South Korea
fYear
34851
fDate
7-9 Jun1995
Firstpage
46
Lastpage
47
Abstract
We have developed an aspect ratio conversion (ARC) system using a scan-line video processor (SVP) for various types of NTSC signal; ARC algorithms were implemented by programming the SVP and an interlaced to progressive scan conversion (IPC) system was added using an ASIC chip
Keywords
application specific integrated circuits; digital signal processing chips; digital television; telecommunication standards; television receivers; television standards; video signal processing; ARC algorithms; ASIC chip; IPC system; NTSC signal; aspect ratio conversion system; interlaced to progressive scan conversion system; scan-line video processor; Clocks; Consumer electronics; Filtering; Finite impulse response filter; Hardware; Interpolation; Motion pictures; Signal processing; Signal processing algorithms; TV;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 1995., Proceedings of International Conference on
Conference_Location
Rosemont, IL
Print_ISBN
0-7803-2140-5
Type
conf
DOI
10.1109/ICCE.1995.517887
Filename
517887
Link To Document