Title :
Hardware-Efficient Architecture for Generalized Voronoi Diagram Construction Using a Prediction-Correction Approach
Author :
Vachhani, Leena ; Sridharan, K.
Abstract :
Digital multisignature is signed by multiple signers with the knowledge of multiple private keys and can be verified based on all signers´ public keys. In 2004, Rahul et al. proposed a multisignature scheme for implementing safe delivery rule in group communication systems. In 2005, Das et al. pointed out weaknesses to forgery as well as signature integrity attacks on Rahul et al.´s scheme. We show that the forgery attack of Das el al. on Rahul et al.´s scheme is infeasible. Further, the drawbacks of Rahul et al.´s and Das et al.´s schemes are that the size of multisignature and the computational time for verification of multisignature increase as the number of signers in a group increases. In this paper, we propose the improvement of Rahul et al.´s scheme to overcome these weaknesses. Even if there be an arbitrary number of signers in a group, in our scheme, the computation for verification time of multisignature and the size of multisignature are independent of the number of signers in that group. In addition, our scheme is more secure and efficient compared to the previously published schemes.
Keywords :
digital signatures; private key cryptography; public key cryptography; digital multisignature scheme; forgery attack; group communication systems; multiple private keys; signer public keys; Computer architecture; Field programmable gate arrays; Hardware; Indoor environments; Intrusion detection; Mobile robots; Robot kinematics; Robot sensing systems; Sensor arrays; Terminology;
Conference_Titel :
Advanced Computing and Communications, 2007. ADCOM 2007. International Conference on
Conference_Location :
Guwahati, Assam
Print_ISBN :
0-7695-3059-1
DOI :
10.1109/ADCOM.2007.42