DocumentCode
2711520
Title
Design for Efficiency Improvement and Future prediction in Multi Chip Module for DC-DC Converter
Author
Kawaguchi, Yuki ; Kawano, T. ; Ono, Shintaro ; Nakagawa, A. ; Takei, H.
Author_Institution
Toshiba Corporation Semiconductor Company, Discrete Semiconductor division, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki, 212-8583
fYear
2006
fDate
18-22 June 2006
Firstpage
1
Lastpage
6
Abstract
We present the importance of all the parasitic inductance of the main current path. In order to reduce this parasitic inductance, we adopted new multi chip module (MCM). The MCM has successfully improved the conversion efficiency because of its minimum parasitic inductances. We also introduced new figure of merit (FOM), RonQstr, corresponding to reduction of parasitic LCR. The value of new FOM of conventional trench MOSFET is favorable and efficiency is expected to be reduced by parasitic LCR.
Keywords
Circuit simulation; Clocks; DC-DC power converters; Energy consumption; Inductance; Low voltage; MOSFET circuits; Power MOSFET; SPICE; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE
ISSN
0275-9306
Print_ISBN
0-7803-9716-9
Type
conf
DOI
10.1109/PESC.2006.1711876
Filename
1711876
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