Title :
Memory Design and Exploration for Low-power Embedded Applications: A Case Study on Hash Algorithms
Author :
Bhattacharya, Debojyoti ; Saha, Avishek
Author_Institution :
IIT Kharagpur, Kharagpur
Abstract :
Constraints imposed on various resources in embedded computing make it a challenging design space. One such important constraint is memory. Proper cache design can overcome this memory bottleneck. In our paper, we propose a methodology for cache design space exploration specific to cryptographic hash functions. The proposed methodology finds a speed-power optimized cache configuration. We also describe the experimental procedure towards formulation of the proposed exploration algorithm. Experiments are performed on two cryptographic hash functions, namely, SHA -1 and MD5. Our approach tries to reduce the exploration search space and hence is better than traditional exhaustive search.
Keywords :
cache storage; cryptography; embedded systems; cache design; cryptographic hash functions; embedded computing; hash algorithms; low-power embedded application; memory design; memory exploration; space exploration; Algorithm design and analysis; Application software; Computational modeling; Cryptography; Design methodology; Design optimization; Embedded computing; Embedded system; Hardware; Space exploration;
Conference_Titel :
Advanced Computing and Communications, 2007. ADCOM 2007. International Conference on
Conference_Location :
Guwahati, Assam
Print_ISBN :
0-7695-3059-1
DOI :
10.1109/ADCOM.2007.88