DocumentCode :
2711746
Title :
Design and Implementation of RS (32, 28) Encoder and Decoder Using Cellular Automata
Author :
Ghosh, Sudip ; Alam, M. ; Kumar, Kush ; Mukhopadhyay, Debdeep ; Chowdhury, Dibakar Roy
Author_Institution :
IIT Kharagpur, Kharagpur
fYear :
2007
fDate :
18-21 Dec. 2007
Firstpage :
491
Lastpage :
496
Abstract :
Masking of gates is one of the most popular techniques to prevent differential power analysis (DPA) of AES S-boxes. However due to the presence of glitches in circuits even masked circuits leak side-channel information. Motivated by this fact, we proposed a balanced masked multiplier where the inputs are synchronized either by sequential components or controlled AND logic, that can be a possible solution for preventing DPA attack on masked implementation of AES S-boxes. Detailed SPICE results are shown to support the claim that the modifications indeed reduce the vulnerability of the masked multiplier against DPA attacks.
Keywords :
SPICE; cryptography; logic gates; multiplying circuits; sequential circuits; SPICE; balanced masked multiplier; circuits glitches; controlled AND logic; differential power analysis; gates masking; masked advanced encryption standard S-box; sequential components; side-channel leakage prevention; Block codes; CD recording; Decoding; Error correction; Error correction codes; Galois fields; Parity check codes; Reed-Solomon codes; Telecommunication computing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Computing and Communications, 2007. ADCOM 2007. International Conference on
Conference_Location :
Guwahati, Assam
Print_ISBN :
0-7695-3059-1
Type :
conf
DOI :
10.1109/ADCOM.2007.67
Filename :
4426017
Link To Document :
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