Matching of MOS transistors with different layout styles

Author

Bastos, J. ; Steyaert, M. ; Graindourze, B. ; Sansen, W.

Author_Institution

ESAT-MICAS, Katholieke Univ., Leuven, Belgium

fYear

1996

fDate

25-28 Mar 1996

Firstpage

17

Lastpage

18

Abstract

A test chip with NMOS transistor pairs with different layout styles to study its influence on matching is presented. Common centroid structures are found to have much better matching performance than finger style structures. They show no systematic mismatch, and have a matching dependence on the channel area which is in agreement with measurement results on simple rectangle structures. Under die stress induced by packaging, finger style transistor pairs show a spread on transistor matching up to 5 times higher than the value predicted by only considering random fluctuation of the channel area

Keywords

CMOS integrated circuits; MOSFET; impedance matching; integrated circuit layout; integrated circuit packaging; integrated circuit testing; network topology; CMOS technology; NMOS transistor pairs; channel area; common centroid structures; die stress; finger style structures; finger style transistor pairs; layout styles; matching; packaging; rectangle structures; Anisotropic magnetoresistance; Area measurement; CMOS technology; Fingers; Fluctuations; MOSFETs; Packaging; Stress; Temperature; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1996. ICMTS 1996. Proceedings. 1996 IEEE International Conference on

Conference_Location

Trento

Print_ISBN

0-7803-2783-7

Type

conf

DOI

10.1109/ICMTS.1996.535615

Filename

535615