The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices

In this paper, we present the results of a detailed study done on the correlation between frequency dispersion observed in AC admittance measurements and threshold voltage shifts observed in BTI reliability measurements on III-V MOS devices. We developed a detailed AC admittance model for MOS devices with border traps to study the effect of trap parameters on the AC admittance. We show, with the help of simulations and experiments, a clear correlation between border trap characteristics in AC admittance and BTI behavior. In addition, we propose a simplified and quick method to qualitatively characterize border traps using G/ω as a measure for their density.