DocumentCode :
2712743
Title :
Comparative Evaluation of Pulse-Width Modulation Strategies for Z-Source Neutral-Point-Clamped Inverter
Author :
Loh, Poh Chiang ; Blaabjerg, Frede ; Wong, C.P.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ.
fYear :
2006
fDate :
18-22 June 2006
Firstpage :
1
Lastpage :
7
Abstract :
Z-source neutral-point-clamped (NPC) inverter has recently been proposed as an alternative three-level buck-boost power conversion solution with an improved output waveform quality. In principle, the designed Z-source inverter functions by selectively "shooting through" its power sources, coupled to the inverter using two unique Z-source impedance networks, to boost the inverter three-level output waveform. Proper modulation of the new inverter would therefore require careful integration of the selective shoot-through process to the basic switching concepts to achieve maximal voltage-boost, minimal harmonic distortion, lower semiconductor stress and minimal number of device commutations per switching cycle. To date, the theoretical background on Z-source NPC modulation has not been fully established, and it is the theme of this paper to propose a number of enhanced voltage-boost pulse-width modulation (PWM) strategies for controlling the Z-source NPC inverter. While developing the PWM techniques, attention has been devoted to carefully derive them from a common generic basis for improved portability, easier implementation, and most importantly, assisting readers in understanding all concepts that have been presented. The presented strategies are also comparatively evaluated to identify their individual advantages and disadvantages, which are subsequently summarized in a comprehensive reference table. Lastly, simulation and experimental results are included for validating the performances and practicalities of the presented modulation schemes
Keywords :
PWM invertors; harmonic distortion; switching convertors; PWM techniques; Z-source impedance networks; Z-source neutral-point-clamped inverter; harmonic distortion; inverter three-level output waveform; pulse-width modulation strategies; semiconductor stress; three-level buck-boost power conversion solution; waveform quality; Harmonic distortion; Impedance; Power conversion; Power semiconductor switches; Pulse inverters; Pulse modulation; Pulse width modulation; Pulse width modulation inverters; Stress; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE
Conference_Location :
Jeju
ISSN :
0275-9306
Print_ISBN :
0-7803-9716-9
Type :
conf
DOI :
10.1109/PESC.2006.1711956
Filename :
1711956
Link To Document :
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