0.18 μm CMOS LNA and mixer for wireless LAN applications

Author

Krizhanovskii, Vladirnir ; Kien, Nguyen Trung ; Lee, Sang-Gug

Author_Institution

RF Microelectron. Lab., Inf. & Commun. Univ., Daejeon, South Korea

fYear

2002

fDate

9-13 Sept. 2002

Firstpage

137

Lastpage

138

Abstract

A low noise amplifier (LNA) and mixer for 5.15-5.825 GHz wireless local area network (LAN) applications were designed and fabricated in 0.18 μm CMOS technology. The newly proposed topologies are described. Simulation results for the LNA are: noise figure (NF) of 1.72 dB, power gain of 18.6 dB, and input 1-dB compression point (P_-1dB) of -15.6 dBm. Simulation results for the mixer are: power conversion gain of 7.8 dB, input 3^rd-order intercept point (IP3) of 6.6 dBm, input P_-1dB of -3.5 dBm, and single side-band NF of 7.1 dB.

Keywords

CMOS integrated circuits; MMIC amplifiers; MMIC mixers; circuit simulation; field effect MMIC; integrated circuit design; integrated circuit modelling; network topology; wireless LAN; 0.18 micron; 1.72 dB; 18.6 dB; 5.15 to 5.825 GHz; 7.1 dB; 7.8 dB; CMOS LNA; CMOS mixer; circuit topologies; input compression point; input intercept point; low noise amplifier; noise figure; power conversion gain; power gain; simulation; single side band NF; wireless LAN applications; wireless local area network; Bonding; Character generation; Cutoff frequency; Inductors; Noise reduction; Performance gain; Resonance; Topology; Transconductance; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave and Telecommunication Technology, 2002. CriMiCo 2002. 12th International Conference

Print_ISBN

966-7968-12-X

Type

conf

DOI

10.1109/CRMICO.2002.1137178

Filename

1137178