DocumentCode
2714192
Title
Design and implementation of least mean square adaptive filter on Altera Cyclone II Field Programmable Gate Array for active noise control
Author
Mustafa, R. ; Ali, M. A Mohd ; Umat, C. ; Al-Asady, D.A.
Author_Institution
Dept. of Electr., UKM, Bangi, Malaysia
Volume
1
fYear
2009
fDate
4-6 Oct. 2009
Firstpage
479
Lastpage
484
Abstract
This paper presents a design and implementation of least mean square (LMS) adaptive filter for use in active noise control (ANC) application. The filter has been designed and synthesized with Altera Quartus II development platform and implemented on Cyclone II FPGA available on Altera DE2 development board. Architecture of the adaptive filter is based on conventional multiplier-adder to realize the multiply and accumulate (MAC) operation for FIR, implementing 64 filter tap with 9- bit signed integer coefficients. A uniform random signal with the bandwidth of 24 KHz is used as the test and reference signal for the filter verification. This signal is generated internally on FPGA based on LFSR technique. Performance of the filter is evaluated by means of convergence speed (with different step size, ¿ ) and comparison of adaptive filter coefficients with the unknown system. A fixed filter is programmed to behave as a bandpass FIR Hamming-type window with the cut-off frequency from 250 Hz to 3400 Hz to act as the unknown system. The results conclude that the LMS adaptive filter designed have successfully adapted with the unknown system with the fastest convergence speed of 1.46 ms at 1/210 step size.
Keywords
FIR filters; active noise control; adaptive filters; band-pass filters; field programmable gate arrays; least mean squares methods; Altera Cyclone II; Altera DE2; FIR filter; active noise control; adaptive filter; bandpass FIR Hamming-type window; bandwidth 24 kHz; field programmable gate array; frequency 250 Hz to 3400 Hz; least mean square; Active noise reduction; Adaptive arrays; Adaptive filters; Band pass filters; Bandwidth; Convergence; Cyclones; Field programmable gate arrays; Finite impulse response filter; Least squares approximation; Convergence Speed; FPGA; Least Mean Square;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics & Applications, 2009. ISIEA 2009. IEEE Symposium on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-4681-0
Electronic_ISBN
978-1-4244-4683-4
Type
conf
DOI
10.1109/ISIEA.2009.5356420
Filename
5356420
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