DocumentCode
2714761
Title
A quick address detection of an anomalous memory cell for flash EEPROM
Author
Himeno, Toshihiko ; Hazama, Hiroaka ; Sakui, Koji ; Kanda, Kazushige ; Itoh, Yasuo ; Miyamoto, Jun-ichi
Author_Institution
Semicond. Device Eng. Lab., Toshiba Corp., Tokyo, Japan
fYear
1996
fDate
25-28 Mar 1996
Firstpage
195
Lastpage
199
Abstract
A simple technique for quickly detecting an address of an anomalous memory cell for flash EEPROM devices is described. A proposed Multi-Address Selection Scheme (MASS) can drastically reduce measurement cycles for searching an address of an anomalous memory cell which has an abnormally high or low threshold voltage. A systematic evaluation for the reliability of flash EEPROM has been realized by this quick address detection technology
Keywords
EPROM; integrated circuit reliability; integrated circuit testing; integrated memory circuits; storage allocation; anomalous memory cell; flash EEPROM; multi-address selection scheme; quick address detection; reliability evaluation; threshold voltage; Circuit testing; Current measurement; EPROM; Laboratories; Monitoring; Semiconductor devices; Stress; System testing; Threshold voltage; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1996. ICMTS 1996. Proceedings. 1996 IEEE International Conference on
Conference_Location
Trento
Print_ISBN
0-7803-2783-7
Type
conf
DOI
10.1109/ICMTS.1996.535645
Filename
535645
Link To Document