DocumentCode :
2715090
Title :
Simulation and measurement for decoupling on multilayer PCB DC power buses
Author :
Shi, H. ; Yuan, F. ; Sha, F. ; Drewniak, J.L. ; Hubing, T.H. ; Van Doren, T.P.
Author_Institution :
Dept. of Electr. Eng., Missouri Univ., Rolla, MO, USA
fYear :
1996
fDate :
19-23 Aug 1996
Firstpage :
430
Lastpage :
435
Abstract :
DC power bus decoupling of a multi-layer PCB is modeled by a combination of a lumped circuit model at low frequencies (<200 MHz), and a mixed-potential integral equation approach at high frequencies. In order to determine the lumped parameters of via interconnects, an effective procedure using a network analyzer has been developed to characterize the trace/via inductances/resistances. For an 8"×10" ten-layer test board used in this study, the simulations show good agreement with the measurement. This method can lead to new design strategies of decoupling for multilayer PCB power buses
Keywords :
electric resistance; equivalent circuits; inductance; integral equations; printed circuit layout; printed circuit testing; decoupling; design strategies; high frequencies; inductances; low frequencies; lumped circuit model; mixed-potential integral equation; multilayer PCB DC power buses; network analyzer; resistances; simulations; via interconnects; Bonding; Finite difference methods; Frequency measurement; Interference; Noise measurement; Nonhomogeneous media; Power measurement; Surface-mount technology; Testing; Time domain analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility, 1996. Symposium Record. IEEE 1996 International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3207-5
Type :
conf
DOI :
10.1109/ISEMC.1996.561273
Filename :
561273
Link To Document :
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