Static feedback circuit methodology for solving fixed-point equations

In this paper we consider the use of static analog VLSI circuits for iteratively maximizing cost functions that admit a fixed point recursion. We show through circuit simulation that certain classes of fixed point equations can be solved iteratively via the settling to steady state equilibrium of properly designed static-feedback CMOS circuits biased in the subthreshold region of operation. To demonstrate the power of this approach, we design a family of circuits to compute the right principal singular vector of arbitrarily sized positive real matrices by casting the singular vector extraction problem into a fixed point iterative map. We also illustrate the methodology more simply with a square root solver that uses the Babylonian fixed point equation. All circuits are current-mode translinear circuits with no extrinsic capacitors. This permits fast, low-power computation since the principal delay component is the settling time of the static circuits, and the few transistors required are biased in weak inversion.