DocumentCode
2715448
Title
Metal Gate Recessed Access Device (RAD) for DRAM Scaling
Author
Ramaswamy, Nirmal ; Ananthan, Venkat ; Hwang, David ; Iyer, Ravi ; Mouli, Chandra ; McTeer, Allen ; Tang, Sanh ; Parekh, Kunal ; Owens, Tim ; Kim, Young Pil ; Palaniappan, Nanda ; Li, Jian ; Groothuis, Steve ; Haller, Gordon ; Wang, Shixin
Author_Institution
R&D Process Development, Micron Technology, Inc. Boise, ID. dramaswamy@micron.com
fYear
2007
fDate
20-20 April 2007
Firstpage
42
Lastpage
44
Abstract
A functional DRAM with higher data retention characteristics than a planar access device has been demonstrated, using a metal gate recessed access device (RAD). Chemical vapor deposition (CVD) and atomic layer deposition (ALD) were used to deposit titanium nitride (TiN) and tantalum nitride (TaN), respectively. CVD TiN and ALD TaN-CVD TiN laminate gate stacks were integrated with a RAD module. ALD TaN-CVD TiN laminate gates showed enhanced drive current (IDS), higher transconductance (GM), higher mobility (¿EFF) and reduced off current (IOFF) characteristics compared to CVD TiN gates. Device characteristics and reliability data for both the planar devices and RADs are presented. The ALD TaN-CVD TiN laminate metal gate RAD showed much improved data retention characteristics compared to a conventional planar device with a poly silicon gate. The optimum thickness of ALD TaN in the laminate stack is discussed.
Keywords
Chemical vapor deposition; Conductors; Crystallization; Heat treatment; Laminates; Optical films; Random access memory; Silicon; Tin; Titanium;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics and Electron Devices, 2007. WMED 2007. IEEE Workshop on
Conference_Location
Boise, ID, USA
Print_ISBN
1-4244-1114-9
Electronic_ISBN
1-4244-1114-9
Type
conf
DOI
10.1109/WMED.2007.368056
Filename
4218999
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