NanoCMOS folded cascode OTA performances prediction through least-square method

This paper deals with the prediction of folded cascode OTA performances using upcoming CMOS Nano-process. Thus, the least-square method (LSM) is used to predict the CMOS device primary parameters which are generated for 45nm to 22nm CMOS processes. The predicted parameters are comparable to available published data to check the strength of the used LSM Methodology. Then, the impact of Nanometer CMOS on OTA analog basic block design is highlighted. It shows the potentialities of future CMOS processes to provide high speed and high performances analog circuits to design new generation systems demanding very severe requirements.