DocumentCode
2716099
Title
A suitable NoC switch for on-line routing fault detection
Author
Killian, C. ; Tanougast, C. ; Monteiro, F. ; Dandache, A.
Author_Institution
Lab. Interfaces, Sensors & Microelectron., Univ. of Paul Verlaine, Metz, France
fYear
2011
fDate
26-29 June 2011
Firstpage
145
Lastpage
148
Abstract
In this paper we present an alternate Network-on-Chip switch incorporating a new on-line routing error detection technique. This router implements an adaptive routing algorithm suitable for MPSoC architectures in which dynamic and partial reconfiguration is allowed. The originality of the detection mechanism resides in the capacity to distinguish routing errors from adaptive decisions (to bypass faulty or reconfigurable areas). Moreover, the mechanism is able to detect the failing directions in the faulty switches allowing to not disconnect the entire faulty router. Here, we present the new proposed RTL router architecture with the corresponding error detection algorithm, several study cases being detailed. The implementation results clearly show the pertinence of the approach, an effective tradeoff between hardware overhead and failure detection capacity being reached in this new reconfigurable NoC.
Keywords
error detection; network-on-chip; MPSoC architectures; NoC switch; RTL router architecture; adaptive decisions; dynamic reconfiguration; error detection algorithm; network-on-chip; on-line routing fault detection; partial reconfiguration; Availability; Fault tolerance; Fault tolerant systems; Heuristic algorithms; Routing; Switches; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
Conference_Location
Bordeaux
Print_ISBN
978-1-61284-135-9
Type
conf
DOI
10.1109/NEWCAS.2011.5981276
Filename
5981276
Link To Document