Activity models for use in low power, high-level synthesis

Author

Henning, R. ; Chakrabarti, C.

Author_Institution

Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA

Volume

4

fYear

1999

fDate

15-19 Mar 1999

Firstpage

1881

Abstract

Characteristics of the data being processed can be used to reduce the power consumption in the data path of a VLSI circuit by exploiting their relationship with transition activity during high-level synthesis. Important relationships between fixed-point, two´s complement data characteristics and 0→1 transition activity in static CMOS circuits are presented in this paper. Models for computing transition activity in terms of a new set of transition parameters are developed. Propagation of data characteristics through multiplication and addition functional units is discussed. The use of the relationships and models to analyze and significantly reduce 0→1 transition activity with little computational effort is illustrated with examples

Keywords

CMOS logic circuits; VLSI; adders; fixed point arithmetic; high level synthesis; integrated circuit modelling; multiplying circuits; semiconductor device models; VLSI circuit; activity models; addition functional unit; data characteristics propagation; data path; fixed-point data characteristics; high-level synthesis; low power synthesis; multiplication functional unit; power consumption reduction; transition activity; transition parameters; two´s complement data characteristics; CMOS technology; Capacitance; Circuit synthesis; Energy consumption; Equations; High level synthesis; Power dissipation; Semiconductor device modeling; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1999. Proceedings., 1999 IEEE International Conference on

Conference_Location

Phoenix, AZ

ISSN

1520-6149

Print_ISBN

0-7803-5041-3

Type

conf

DOI

10.1109/ICASSP.1999.758290

Filename

758290