Title :
Low-power channel coding via dynamic reconfiguration
Author :
Goel, Manish ; Shanbhag, Naresh R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
Abstract :
Presented in this paper are energy-optimum reconfiguration strategies for channel codecs. These strategies are derived by solving an optimization problem, which has energy consumption as the objective function and a constraint on the bit error-rate (BER). Energy consumption models for a reconfigurable Reed-Solomon (RS) codec are derived via gate-level simulation of the finite field arithmetic modules. These energy models along with the BER expressions are then employed to derive the energy-optimum reconfiguration strategies. The energy savings are computed by comparing the energy consumption of the reconfigurable codec with that of the static codec. The energy savings range from 0%-83% for channel signal-to-noise ratio (SNR) variations from 7 dB-10 dB. On an average 55% energy savings are achieved
Keywords :
CMOS logic circuits; Galois fields; Reed-Solomon codes; VLSI; channel coding; codecs; digital arithmetic; error statistics; logic simulation; BER constraint; CMOS technology; Galois field; VLSI design; XOR gates; bit error-rate; channel codecs; dynamic reconfiguration; energy consumption models; energy savings; energy-optimum reconfiguration; finite field arithmetic modules; gate-level simulation; low-power channel coding; objective function; optimization problem; reconfigurable Reed-Solomon codec; signal-to-noise ratio; static codec; Arithmetic; Bit error rate; Channel coding; Codecs; Computational modeling; Constraint optimization; Energy consumption; Galois fields; Reed-Solomon codes; Signal to noise ratio;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1999. Proceedings., 1999 IEEE International Conference on
Conference_Location :
Phoenix, AZ
Print_ISBN :
0-7803-5041-3
DOI :
10.1109/ICASSP.1999.758293
