Title :
A 1-micron VLSI implementation and design of a parallel Hough transformer
Author :
Mostafavi, T. ; Vishin, S.
Author_Institution :
Dept. of Comput. Sci., North Carolina Univ., Charlotte, NC, USA
Abstract :
A VLSI chip based on a parallel version of the Hough transform has been designed and implemented in 1- mu m CMOS. The chip accepts the incoming pixels serially and transforms it into a different parameter space while the expected feature is matched against the incoming pixels. A set of about 86 chips like this will be used to extract the features from a 256*256-pixel grey image. The parallel architecture and the simple operations on each pixel make it suitable for VLSI. Test vectors for the entire 1/4-million-transistor chip have been determined.<>
Keywords :
CMOS integrated circuits; VLSI; computerised picture processing; microprocessor chips; parallel algorithms; parallel architectures; transforms; 1 micron; 256 pixel; CMOS IC; Hough transform; VLSI; computerised picture processing; design; grey image; image processor chip; parallel architecture; picture size; Computer science; Feature extraction; Hardware; Image edge detection; Object detection; Parallel architectures; Pixel; Shape; Testing; Very large scale integration;
Conference_Titel :
System Theory, 1988., Proceedings of the Twentieth Southeastern Symposium on
Conference_Location :
Charlotte, NC, USA
Print_ISBN :
0-8186-0847-1
DOI :
10.1109/SSST.1988.17122
