Title :
Optimization techniques for high order phase-locked loop type jitter reduction circuit for digital audio
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Hong Kong
Abstract :
Techniques like gain peaking reduction and the selection of voltage-controlled-crystal-oscillator (VCXO) frequency are addressed in this paper. The new gain peaking reduction criterion provides far better jitter attenuation when compared with that using maximum phase margin
Keywords :
audio discs; audio-frequency oscillators; circuit optimisation; digital filters; digital phase locked loops; interference suppression; jitter; voltage-controlled oscillators; digital audio; gain peaking reduction; high order phase-locked loop type jitter reduction circuit; jitter attenuation; optimization techniques; voltage-controlled-crystal-oscillator frequency; Attenuation; Circuits; Clocks; Crosstalk; Degradation; Frequency; Phase locked loops; Signal sampling; Timing jitter; Transfer functions;
Conference_Titel :
Consumer Electronics, 1995., Proceedings of International Conference on
Conference_Location :
Rosemont, IL
Print_ISBN :
0-7803-2140-5
DOI :
10.1109/ICCE.1995.518023
