Digital decoder chipset for improved wide-screen TV receivers

Author

Dammann, Martin ; Vlek, Theo

Author_Institution

Philips Semicond., Hamburg, Germany

fYear

34851

fDate

7-9 Jun1995

Firstpage

396

Lastpage

397

Abstract

Prototype PALplus TV sets used programmable signal processing devices to demonstrate the decoder functions. In preparation for larger-scale production of PALplus sets, a co-design/development activity has been initiated between Philips Semiconductors and Philips Sound and Vision to implement the decoder function in two application specific submicron CMOS ICs. The specification of these ICs satisfies the requirements of the PALplus system specification. Interfacing to the existing architecture of a digital feature environment is provided The chipset has a digital I/O allowing optimal picture quality for 100 Hz PALplus TV sets. Samples are expected in mid 1995 to meet the target for the introduction of PALplus TV sets using the dedicated chipset during the 1995 Internationale Funkausstellung (IFA)

Keywords

CMOS digital integrated circuits; application specific integrated circuits; consumer electronics; decoding; digital signal processing chips; digital television; telecommunication standards; television receivers; television standards; video signal processing; 100 Hz; PALplus TV sets; PALplus system specification; Philips Semiconductors; Philips Sound and Vision; application specific submicron CMOS IC; architecture; decoder functions; digital I/O; digital decoder chipset; digital feature environment; optimal picture quality; programmable signal processing devices; wide-screen TV receivers; Band pass filters; Bandwidth; Color; Decoding; Demodulation; Image reconstruction; Prototypes; Signal processing; TV broadcasting; TV receivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, 1995., Proceedings of International Conference on

Conference_Location

Rosemont, IL

Print_ISBN

0-7803-2140-5

Type

conf

DOI

10.1109/ICCE.1995.518038

Filename

518038