High-performance FPGA filters using sigma-delta modulation encoding

Author

Dick, Chris ; Harris, Fred

Author_Institution

Xilinx Inc., San Jose, CA, USA

Volume

4

fYear

1999

fDate

15-19 Mar 1999

Firstpage

2123

Abstract

This paper investigates an architectural option for constructing high sample-rate narrow-band single rate and multi-rate filters using Xilinx field programmable gate array (FPGA) technology. Sigma-delta modulation encoding is applied to the input data in order to effect a reduction in the precision of the arithmetic units in the filter. This is done without compromising the signal integrity within the band of interest. The implementation provides a significant savings in device logic resources in comparison to other techniques that provide the same functionality. The sigma-delta preprocessor is described and its implementation using XC4000 FPGAs is reported. The architecture of the reduced precision filter is presented and its FPGA realization described

Keywords

digital filters; encoding; field programmable gate arrays; sigma-delta modulation; signal sampling; XC4000 FPGA; Xilinx field programmable gate array; arithmetic units; high-performance FPGA filters; input data; logic resources saving; narrow-band multi-rate filters; narrow-band single rate filters; precision reduction; reduced precision filter architecture; sample rate filters; sigma-delta modulation encoding; sigma-delta preprocessor; Arithmetic; Delay; Delta-sigma modulation; Dynamic range; Encoding; Field programmable gate arrays; Finite impulse response filter; Logic devices; Narrowband; Programmable logic arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1999. Proceedings., 1999 IEEE International Conference on

Conference_Location

Phoenix, AZ

ISSN

1520-6149

Print_ISBN

0-7803-5041-3

Type

conf

DOI

10.1109/ICASSP.1999.758353

Filename

758353