Techniques and mechanisms for dynamic reconfiguration in an image processor

Author

Boschetti, Marcos R. ; Adario, Alexando M S ; Silva, Ivan S. ; Bampi, Sergio

Author_Institution

Inst. for Informatics, Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil

fYear

2002

fDate

2002

Firstpage

177

Lastpage

182

Abstract

This work presents an overview of the methodology used to develop dynamic reconfiguration mechanisms for the image processor called DRIP. These techniques included in the design flow try to identify the most effective datapath and control architectures to overcome time-consuming reconfiguration delays and to provide a higher level of programmability to the reconfigurable system.

Keywords

circuit CAD; field programmable gate arrays; image processing; image processing equipment; integrated circuit design; logic CAD; microprocessor chips; reconfigurable architectures; DRIP image processor; control architectures; datapath architectures; design flow; dynamic reconfiguration mechanisms; dynamic reconfiguration techniques; dynamically reconfigurable image processor; reconfigurable system programmability; reconfiguration delays; Algorithm design and analysis; Application specific processors; Computer architecture; Control systems; Cost function; Delay effects; Field programmable gate arrays; Hardware; Informatics; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits and Systems Design, 2002. Proceedings. 15th Symposium on

Print_ISBN

0-7695-1807-9

Type

conf

DOI

10.1109/SBCCI.2002.1137655

Filename

1137655