Design and applications of SDH cross-connection ASIC

Author

Peng, Rong ; Depeng, Jin ; Lieguang, Zeng

Author_Institution

State Key Lab. on Microwave & Digital Commun., Tsinghua Univ., Beijing, China

Volume

2

fYear

2000

fDate

2000

Firstpage

1041

Abstract

The development of the synchronous digital hierarchy (SDH) technique relies on the evolution of ASIC. This paper introduces a novel SDH cross-connection ASIC designed by the E&E department of Tsinghua University. This chip can provide non-blocking cross-connection based on any combination of TU channels between eight STM-1 input streams and eight STM-1 output streams. A newly developed built-in test circuit is embedded within the chip. This paper also analyses its timing performance and presents its applications

Keywords

application specific integrated circuits; built-in self test; synchronous digital hierarchy; timing; E&E department; SDH; STM-1; TU channels; Tsinghua University; built-in test circuit; cross-connection ASIC; input streams; non-blocking cross-connection; output streams; synchronous digital hierarchy; timing performance; Application specific integrated circuits; Built-in self-test; Clocks; Digital communication; Microprocessors; Microwave theory and techniques; Performance analysis; Research and development; Synchronous digital hierarchy; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Communication Technology Proceedings, 2000. WCC - ICCT 2000. International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-6394-9

Type

conf

DOI

10.1109/ICCT.2000.890854

Filename

890854