CMOS SRAM test based on quiescent supply current in write operation

Author

Hashizume, Masaki ; Taga, Kiyoshige ; Koyama, Takeshi ; Tamesada, Takemomi

Author_Institution

Fac. of Eng., Tokushima Univ., Japan

fYear

1995

fDate

7-8 Aug 1995

Firstpage

42

Lastpage

47

Abstract

A large quiescent supply current of mA order flows when a data is written in a CMOS SRAM IC. In this paper, we discuss whether faulty CMOS SRAM ICs, which can not produce the expected outputs, can be detected by measuring quiescent supply currents generated in write operations instead of output logic values. A fault detection method based on the supply current is proposed and is evaluated by some experiments. The method detects 62% of the faulty CMOS SRAM ICs used in the experiments with a small number of test inputs. Also, the total test time can be reduced if the method is used as a pretest method of functional testing. These results suggest that faulty CMOS SRAM ICs can be detected by measuring the supply currents in write operations

Keywords

CMOS memory circuits; SRAM chips; electric current measurement; fault diagnosis; integrated circuit testing; fault detection method; faulty CMOS SRAM IC; functional testing; integrated circuit testing; pretest method; quiescent supply current; test inputs; total test time; write operation; CMOS integrated circuits; CMOS logic circuits; Circuit faults; Circuit testing; Current measurement; Current supplies; Fault detection; Integrated circuit testing; Logic testing; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Technology, Design and Testing, 1995., Records of the 1995 IEEE International Workshop on

Conference_Location

San Jose, CA

Print_ISBN

0-8186-7102-5

Type

conf

DOI

10.1109/MTDT.1995.518080

Filename

518080