• DocumentCode
    2718488
  • Title

    Data transfer and storage exploration for real-time implementation of a digital audio broadcast receiver on a Trimedia processor

  • Author

    Miranda, M. ; Ghez, C. ; Brockmeyer, E. ; Op De Beeck, P. ; Catthoor, F.

  • Author_Institution
    IMEC Lab., Leuven, Belgium
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    373
  • Lastpage
    378
  • Abstract
    The implementation of advanced channel receivers using low-end, though specialised instruction set, media processors is very attractive because of design productivity and cost efficiency reasons. However, achieving real-time using these platforms is not a trivial task. In this paper, we illustrate the application of our data transfer and storage exploration methodology for the implementation of a digital audio broadcast (DAB) channel receiver in real-time using a low-end Trimedia TM1000 processor. We show how the platform independent data transfer and storage related bottlenecks are first eliminated, so in a second phase, the resulting application source code can be transformed to optimally exploit the available memory hierarchy while efficiently using the sub-word-level acceleration capabilities provided by Trimedia´s instruction set architecture. These optimisations have brought sufficient speed-up improvements so as to allow real-time execution of the decoder, obtaining about a factor 8 speed-up when compared to a reference functional implementation of the DAB standard.
  • Keywords
    digital audio broadcasting; embedded systems; instruction sets; microprocessor chips; optimisation; radio receivers; storage management; DAB receiver Trimedia processor real-time implementation; advanced channel receivers; application source code; available memory hierarchy; data transfer/storage exploration methodology; decoder speed-up factor; digital audio broadcast channel receivers; instruction set architecture sub-word-level acceleration capabilities; low-end processors; low-end specialised instruction set media processors; memory organisation; platform independent data transfer/storage related bottleneck elimination; system optimisation; Acceleration; Costs; Decoding; Digital audio broadcasting; Information processing; Instruction sets; Land mobile radio; Power dissipation; Productivity; Real time systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits and Systems Design, 2002. Proceedings. 15th Symposium on
  • Print_ISBN
    0-7695-1807-9
  • Type

    conf

  • DOI
    10.1109/SBCCI.2002.1137685
  • Filename
    1137685