DocumentCode
2718550
Title
Gallium arsenide MESFET memory architectures
Author
López, J.F. ; Eshraghian, K. ; McGeever, M.E. ; Núñez, A. ; Sarmiento, R.
Author_Institution
Centre for Appl. Microelectron., Univ. of Las Palmas, Gran Canaria, Spain
fYear
1995
fDate
7-8 Aug 1995
Firstpage
103
Lastpage
108
Abstract
Gallium arsenide (GaAs) technology, because of its high speed, offers an alternative to silicon (Si). For the particular case of digital memories, speed has great importance taking into account that the success of a high-performance microprocessor depends greatly on how fast data are obtained and sent to memory. However, GaAs presents some problems when implementing memories, mainly due to its leaky characteristics and the small output logic swing compared to that produced in MOS devices. In this paper, novel architectures are proposed in order to overcome these problems. As a result, different designs have been implemented for 2- and 5-kbit ROMs, and for a 14-kbit DRAM
Keywords
DRAM chips; III-V semiconductors; MESFET integrated circuits; Schottky gate field effect transistors; field effect memory circuits; gallium arsenide; memory architecture; microprocessor chips; read-only storage; 14 kbit; 2 kbit; 5 kbit; DRAM; GaAs MESFET memory architectures; ROM; digital memories; high-performance microprocessor; high-speed technology; leaky characteristics; output logic swing; FETs; Gallium arsenide; Leakage current; Logic; MESFETs; Memory architecture; Random access memory; Read only memory; Temperature; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 1995., Records of the 1995 IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-7102-5
Type
conf
DOI
10.1109/MTDT.1995.518090
Filename
518090
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