Title :
A 32-bit complex-arithmetic integer logic unit with dynamic accuracy
Author :
vanDrunen, R. ; Diepenhorst, M. ; Poppinga, G. ; Spaanenburg, L.
Author_Institution :
Dept. of Comput. Sci., Groningen Univ., Netherlands
Abstract :
A pipelined 32-bits integer arithmetic unit with dynamic accuracy is described, that supports addition/subtraction, multiplication/division, power/root and a number of mixed operations such as sum of squares directly in hardware, and is easily extended for floating-point and adaptive accuracy computations. In a 0.8 μm CMOS technology, this module houses 3k transistors on a 2.5 mm2 area and operates at about 100 MHz external clock
Keywords :
CMOS logic circuits; floating point arithmetic; pipeline arithmetic; 0.8 micron; 100 MHz; 32 bit; CMOS technology; addition; complex-arithmetic integer logic unit; division; dynamic accuracy; floating-point; multiplication; pipelined unit; subtraction; CMOS technology; Clocks; Decoding; Encoding; Floating-point arithmetic; Hardware; Interpolation; Logic; Table lookup; Writing;
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
DOI :
10.1109/CICC.1995.518132
