DocumentCode
2718971
Title
Semi-custom ASIC technology trends
Author
Brassington, Michael P.
Author_Institution
Sun Microsyst. Inc., Menlo Park, CA, USA
fYear
1995
fDate
1-4 May 1995
Firstpage
47
Lastpage
54
Abstract
Some of the high level trends in semi-custom (standard cell and gate array) ASIC technology are identified. Development of ASIC technologies has accelerated to a point where the rate of introduction of new technologies exceeds that of DRAM technology. Implications for process performance, packing density, and cost are discussed. A simple algorithm to model ASIC cost is presented and used to estimate gate and pin counts for optimum costs
Keywords
application specific integrated circuits; cellular arrays; economics; integrated circuit manufacture; integrated circuit technology; logic arrays; cost; gate array; gate counts; packing density; pin counts; process performance; semi-custom ASIC technology; standard cell; Application specific integrated circuits; Integrated circuit reliability; Integrated circuit technology; Optimized production technology; Power system reliability; Prototypes; Random access memory; Regulators; Scattering; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location
Santa Clara, CA
Print_ISBN
0-7803-2584-2
Type
conf
DOI
10.1109/CICC.1995.518135
Filename
518135
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