DocumentCode
2718972
Title
Reliability tests for system-on-chip design
Author
Firtat, Bogclan ; Enoiu, Claudia ; Delovsky, Goran
Author_Institution
Nat. Inst. for Res. & Dev. in Microtechnol., Bucharest, Romania
Volume
2
fYear
2004
fDate
4-6 Oct. 2004
Firstpage
471
Abstract
System-on-chip (SoC) has created a new set of design challenges. The higher integration capacity of SoC reduces the number of components in the system and trims the size and routing complexity of the printed circuit board. Reliability tests for such systems were described. With ever shrinking geometries and higher density circuits, the issue of errors and reliability in complex SoC design is set to become an increasingly challenging issue for the industry as a whole.
Keywords
integrated circuit design; integrated circuit reliability; integrated circuit testing; system-on-chip; SoC design; complex system on chip design; density circuits; integrated circuit design; integrated circuit testing; integration capacity; reliability tests; routing complexity; Circuit testing; Electronic equipment testing; IEC standards; Life estimation; Performance evaluation; Semiconductor device packaging; System testing; System-on-a-chip; Temperature dependence; Thermal stresses;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference, 2004. CAS 2004 Proceedings. 2004 International
Print_ISBN
0-7803-8499-7
Type
conf
DOI
10.1109/SMICND.2004.1403051
Filename
1403051
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