Title :
Fast parasitic extraction for substrate coupling in mixed-signal ICs
Author :
Verghese, Nishath K. ; Allstot, David J. ; Wolfe, M.A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
Techniques for the fast extraction of substrate resistances in mixed-signal integrated circuits are presented. For a given process, a simple analytical model for point-to-point substrate impedance is determined during a preprocessing stage. A hierarchical extraction strategy is then employed using this simple analytical model in conjunction with a delimitation technique to quickly determine resistive coupling through the substrate on a cell-by-cell basis. The extraction procedure yields a resistive netlist which when simulated along with necessary parasitic capacitances and the circuit itself determines any performance limitations in the design due to substrate coupling. The extraction procedure has been used in the verification and redesign of a triple 8-bit video A/D converter IC for substrate-noise problems
Keywords :
analogue-digital conversion; electric impedance; integrated circuit modelling; mixed analogue-digital integrated circuits; substrates; video signal processing; 8 bit; cell-by-cell basis; delimitation technique; extraction procedure; fast parasitic extraction; hierarchical extraction strategy; mixed-signal ICs; parasitic capacitances; performance limitations; point-to-point substrate impedance; resistive coupling; substrate coupling; substrate resistances; video A/D converter IC; Analytical models; CMOS logic circuits; Coupling circuits; Crosstalk; Impedance; Instruments; Integrated circuit noise; Packaging; Semiconductor device noise; Substrates;
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
DOI :
10.1109/CICC.1995.518149
