Title :
A modular architecture for hybrid VLSI neural networks and its application in a smart photosensor
Author :
Djahanshahi, H. ; Ahmadi, M. ; Jullien, G.A. ; Miller, W.C.
Author_Institution :
Dept. of Electr. Eng., Windsor Univ., Ont., Canada
Abstract :
We describe a modular architecture for the VLSI implementation of multilayer neural networks using a universal hybrid building block. Based on this approach, a programmable smart photosensor is designed which is in fact a VLSI realization of a multilayer feedforward neural network with an integrated photoreceptor array using 1.2 μm CMOS technology. Each universal building block in this architecture comprises a multiplying DAC synapse, a portion of a nonlinear distributed neuron and compact digital registers for programming and storing a synaptic weight. The proposed modular neural network architecture features design simplicity and scalability, area efficiency, reduced interconnection problems and increased robustness. Based on this architecture and using cell-level optimization, the synaptic density in this version of the neural-based smart sensor has been increased by a factor of two. This has lead to an increase in the area available for a larger and higher resolution optical input array
Keywords :
CMOS integrated circuits; VLSI; arrays; feedforward neural nets; intelligent sensors; mixed analogue-digital integrated circuits; multilayer perceptrons; neural chips; neural net architecture; photodetectors; 1.2 mum; CMOS technology; area efficiency; cell-level optimization; compact digital registers; design simplicity; hybrid VLSI neural networks; integrated photoreceptor array; modular architecture; multilayer feedforward neural network; multiplying DAC synapse; nonlinear distributed neuron; optical input array; programmable smart photosensor; reduced interconnection problems; robustness; scalability; smart photosensor; CMOS technology; Feedforward neural networks; Multi-layer neural network; Neural networks; Neurons; Optical arrays; Photoreceptors; Robustness; Scalability; Very large scale integration;
Conference_Titel :
Neural Networks, 1996., IEEE International Conference on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-3210-5
DOI :
10.1109/ICNN.1996.549011