• DocumentCode
    2719563
  • Title

    A second-order double-sampled delta-sigma modulator

  • Author

    Burmas, Ted V. ; Lewis, Stephen H. ; Hurst, Paul J. ; Dyer, Kenneth C.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
  • fYear
    1995
  • fDate
    1-4 May 1995
  • Firstpage
    195
  • Lastpage
    198
  • Abstract
    A second-order double-sampled delta-sigma modulator (DSM) is described. It uses an additive-error switching scheme to convert capacitor mismatch into an additive out-of-band tone that can be removed by a digital filter. At a clock rate of 1.25 MHz and with an oversampling ratio of 256, the maximum measured signal-to-noise-and-distortion ratio is 89.8 dB, and the THD is -96.6 dB when the input is 2 dB below full scale. The modulator is fully differential, occupies 5 mm2, and dissipates 13 mW
  • Keywords
    CMOS integrated circuits; mixed analogue-digital integrated circuits; modulators; sigma-delta modulation; signal sampling; switched capacitor networks; 1.25 MHz; 13 mW; additive out-of-band tone; additive-error switching scheme; capacitor mismatch conversion; double-sampled delta-sigma modulator; second-order type; Baseband; Capacitors; Clocks; Delta modulation; Digital filters; Distortion measurement; Feedback; Operational amplifiers; Sampling methods; Signal to noise ratio;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    0-7803-2584-2
  • Type

    conf

  • DOI
    10.1109/CICC.1995.518166
  • Filename
    518166
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2719563