DocumentCode
2720132
Title
On Quantifying Fault Patterns of the Mesh Interconnect Networks
Author
Safaei, F. ; Fathy, M. ; Khonsari, A. ; Ould-Khaoua, M. ; Shafiei, H. ; Khosravipour, S.
Author_Institution
Sch. of Comput. Sci., IPM, Tehran
fYear
2007
fDate
21-23 May 2007
Firstpage
956
Lastpage
961
Abstract
One of the key issues in the design of multiprocessors system-on-chip (MP-SoCs), multicomputers, and peer-to-peer networks is the development of an efficient communication network to provide high throughput and low latency and its ability to survive beyond the failure of individual components. Generally, the faulty components may be coalesced into fault regions, which are classified into convex and concave shapes. In this paper, we propose a mathematical solution for counting the number of common fault patterns in a 2-D mesh interconnect network including both convex (I-shape, II-shape, square-shape) and concave (L-shape, U- shape, T-shape, +-shape, H-shape) regions. The results presented in this paper which have been validated through simulation experiments can play a key role when studying, particularly, the performance analysis of fault-tolerant routing algorithms and measure of a network fault-tolerance expressed as the probability of a disconnection.
Keywords
fault tolerant computing; multiprocessor interconnection networks; peer-to-peer computing; performance evaluation; system-on-chip; fault patterns; fault-tolerant routing; mesh interconnect networks; multicomputers; multiprocessors system-on-chip; peer-to-peer networks; performance analysis; Analytical models; Communication networks; Delay; Fault tolerance; Multiprocessing systems; Peer to peer computing; Performance analysis; Routing; Shape; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Information Networking and Applications, 2007. AINA '07. 21st International Conference on
Conference_Location
Niagara Falls, ON
ISSN
1550-445X
Print_ISBN
0-7695-2846-5
Type
conf
DOI
10.1109/AINA.2007.98
Filename
4220994
Link To Document