DocumentCode :
2720384
Title :
A chip set for MPEG-2 video encoding
Author :
Armer, John ; Bard, Jean-Michel ; Canfield, Barth ; Charlot, Didier ; Freeman, Smith ; Graf, Andreas ; Kessler, Rolf ; Lamouroux, Gilles ; Mayweather, William T. ; Patti, Michael ; Paul, Philippe ; Pirson, Alain ; Rominger, Friedrich ; Teichner, Detlef
Author_Institution :
David Sarnoff Res. Center, Princeton, NJ, USA
fYear :
1995
fDate :
1-4 May 1995
Firstpage :
401
Lastpage :
404
Abstract :
A VLSI architecture for compression and encoding of digital video signals according to the MPEG-2 Video standard is described. The chip set is based on four different ASICs, implemented in HCMOS4 technology. Each of the ICs controls an external memory space which can be realized with conventional DRAM parts. The chip set is controlled by external standard microcontrollers and includes on-chip RISC machines for programmable options. With these ICs, low complexity real-time MPEG-2 encoders can be implemented as well as high complexity/high quality encoders for standard resolution video and HDTV
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; digital signal processing chips; high definition television; motion estimation; real-time systems; reduced instruction set computing; video coding; video equipment; ASICs; HCMOS4 technology; HDTV; MPEG-2 video encoding; VLSI architecture; chip set; compression; digital video signals; onchip RISC machines; real-time MPEG-2 encoders; Circuits; Consumer electronics; Decoding; Digital video broadcasting; Encoding; Satellite broadcasting; Space technology; Streaming media; Transform coding; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
Type :
conf
DOI :
10.1109/CICC.1995.518212
Filename :
518212
Link To Document :
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