Title :
10 Gb/s framer/demultiplexer IC for SONET STS-192 applications
Author :
Bagheri, M. ; Kong, D.T. ; Hacker, J. ; Schneider, K. ; Chow, J.
Author_Institution :
AT&T Bell Labs., Allentown, PA, USA
Abstract :
This paper presents the first ever reported 10 Gb/s SONET framer/demultiplexer IC which integrates the functions of serial to parallel conversion, byte alignment and frame detection on a single chip. This IC identifies the SONET framing pattern from the input STS-192 data stream, and converts the serial input bit stream into a byte-parallel, frame-synchronized output data stream. It is implemented using a high-current gain baseline AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology, consumes approximately 3 W of power using a -5.2 V supply, has a phase margin of 270° and differential input sensitivity of 100 mVp-p at 10 Gb/s
Keywords :
SONET; application specific integrated circuits; bipolar digital integrated circuits; demultiplexing equipment; synchronisation; -5.2 V; 10 Gbit/s; 3 W; AlGaAs-GaAs; AlGaAs/GaAs heterojunction bipolar transistor technology; SONET STS-192; byte alignment; frame detection; frame synchronization; framer/demultiplexer IC; serial to parallel conversion; Application specific integrated circuits; Artificial intelligence; Clocks; Detectors; Heterojunction bipolar transistors; Payloads; SONET; Shift registers; Signal generators; Synchronous digital hierarchy;
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
DOI :
10.1109/CICC.1995.518216
