DocumentCode :
2721052
Title :
ARSDES: an automated Reed-Solomon decoder and encoder synthesis system
Author :
Sato, Ken´ichi ; Hattori, Masayuki ; Ohya, Noboru ; Sasano, M. ; Shirota, Norihisa
Author_Institution :
Hashimoto Signal Process. Lab., Sony Corp., Japan
fYear :
1995
fDate :
1-4 May 1995
Firstpage :
611
Lastpage :
614
Abstract :
This paper describes the architecture and implementation of the automated synthesis system for Reed-Solomon (RS) decoder and encoder. Given the specifications of a desired RS codec circuit, ARSDES automatically synthesizes, then outputs a circuit in verilog-HDL. The system is constructed using an object-oriented technique so it is easy to maintain and extend the system. A new method is used to construct the automated synthesis system by generating templates of the source code of the system from a description of existing hardware
Keywords :
Reed-Solomon codes; application specific integrated circuits; circuit CAD; codecs; decoding; digital integrated circuits; integrated circuit design; logic CAD; object-oriented methods; ARSDES; RS codec circuit; Reed-Solomon decoder; Reed-Solomon encoder; automated synthesis system; object-oriented technique; verilog-HDL; Arithmetic; Circuit synthesis; Computer architecture; Decoding; Error correction; Error correction codes; Hardware; Large scale integration; Object oriented databases; Reed-Solomon codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
Type :
conf
DOI :
10.1109/CICC.1995.518257
Filename :
518257
Link To Document :
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