A high speed high performance packet switch with redundancy

The architecture of an electro-optical packet switch is outlined. Electronic circuits are used for buffering and control at the switch inputs. The switch outputs do not require logic circuits or buffers, but are simple regenerative repeaters. An optical interconnection network links inputs and outputs. A novel feature of the proposed architecture is the capability to transmit from each input unit up to two packets simultaneously. This proves the reliability of the equipment. Its simulation, when loaded with homogeneous traffic, showed that when input modules are allowed to transmit up to two packets at a time the performance approaches the optimum value. The implementation of the switch with today´s technology is briefly discussed