A Combined Architecture for FDCT Algorithm

Author

Sanyal, Amit ; Samaddar, S.K.

Author_Institution

Dept. of Comput. Applic., NSHM Coll. of Manage. & Technol., Kolkata, India

fYear

2012

fDate

23-25 Nov. 2012

Firstpage

33

Lastpage

37

Abstract

A single generalized architecture has been deviced which can perform 4 FDCT algorithms namely, Arai´s, Chen´s, Loeffler´s and Vetterli´s by varying the control signals. Simulink files containing block design files of 4 FDCT algorithms are included. From the Simulink file appropriate language (VHDL) for the target board (FPGA) can be generated. The VHDL code is run in MODELSIM XE III/Starter 6.1e-custom Xilinx Version. Here the target board is XILINX VIRTEX-IV PRO. The obtained results are compared and concluded.

Keywords

data flow graphs; digital simulation; discrete cosine transforms; field programmable gate arrays; hardware description languages; mathematics computing; Arai´s FDCT algorithm; Chen´s FDCT algorithm; FPGA; Loeffler´s FDCT algorithm; MODELSIM XE III/Starter 6.1e-custom Xilinx Version; Simulink files; VHDL; VHDL code; Vetterli´s FDCT algorithm; XILINX VIRTEX-IV PRO; block design files; combined FDCT algorithm architecture; control signals; target board; Algorithm design and analysis; Architecture; Computer architecture; Discrete cosine transforms; Signal processing algorithms; Software packages; Combined Architecture; Control Signals; FDCT Algorithms; Modelsim simulation; Simulink models; Xilinx synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer and Communication Technology (ICCCT), 2012 Third International Conference on

Conference_Location

Allahabad

Print_ISBN

978-1-4673-3149-4

Type

conf

DOI

10.1109/ICCCT.2012.16

Filename

6394663