• DocumentCode
    2722129
  • Title

    Strained Si and the Future Direction of CMOS

  • Author

    Thompson, Scott E. ; Sun, Guangyu

  • Author_Institution
    Florida Univ., Gainesville, FL
  • fYear
    2006
  • fDate
    24-26 April 2006
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Uniaxial process induced strain is being adopted in all 90, 65, and 45 nm high performance logic technologies. Uniaxial strain offers large performance improvement at low cost and minimally increased manufacturing complexity and is scalable to future technology nodes
  • Keywords
    CMOS logic circuits; elemental semiconductors; nanoelectronics; silicon; 45 nm; 65 nm; 90 nm; CMOS device; Si; high performance logic technologies; strained silicon; uniaxial process induced strain; uniaxial strain; Additives; CMOS technology; Capacitive sensors; Costs; Degradation; High K dielectric materials; High-K gate dielectrics; Immune system; Tensile stress; Uniaxial strain;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 2006 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    1-4244-0181-4
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2006.251060
  • Filename
    4016596