DocumentCode :
2722261
Title :
Hybrid test data compression technique for SOC scan testing
Author :
Cho, Sangwook ; Song, Jaehoon ; Yi, Hyunbean ; Park, Sungju
Author_Institution :
Dept. of Comput. Sci. & Eng., Hanyang Univ., Kyunggi-Do
fYear :
2005
fDate :
19-23 Sept. 2005
Firstpage :
69
Lastpage :
72
Abstract :
A hybrid test data compression technique is proposed to reduce the test application time while keeping test power low by assigning "don\´t cares" to reduce transitions. Initially, test data set is compressed by 0/1 prefix run-length codes. Then, the compressed data are chopped into fixed-length blocks and further encoded by Huffman algorithm. It is observed that the global compression is highly dependent upon the chopping size of initially compressed data upon run-length codes. Since the actual Huffman codes make use of a very small portion of the complete coding space, the decoding logic of our hybrid scheme can be implemented with a very small area penalty. The experiments show significant data compression compared with state-of-the-art techniques
Keywords :
Huffman codes; boundary scan testing; data compression; integrated circuit testing; runlength codes; system-on-chip; Huffman algorithm; SOC scan testing; coding space; decoding logic; don´t care assignment; fixed-length blocks; hybrid test data compression; run-length code; system-on-chip; Arithmetic; Automatic test pattern generation; Automatic testing; Costs; Decoding; Entropy; Frequency; Huffman coding; Logic testing; Test data compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2005. Proceedings. IEEE International
Conference_Location :
Herndon, VA
Print_ISBN :
0-7803-9264-7
Type :
conf
DOI :
10.1109/SOCC.2005.1554457
Filename :
1554457
Link To Document :
بازگشت