Title :
Advanced Substrate Engineering for the Nanotechnology Era
Author_Institution :
SOITEC Pare technologique des Fontaines, Crolles
Abstract :
Engineered substrates is one of the most important innovations of the nanotechnology era driven by the vanishing boundary between substrate design and device architecture. SOI substrates, the first engineered substrates of its kind, have made possible an efficient optimization of MOSFET current drive while minimizing the leakage and reducing parasitic elements, thus enhancing the overall IC performance. Mobility enhancing substrates have added new handles to traditional scaling further improving device and IC performance. An overview of the advances in Smart Cut engineered substrates and the impact on device performance is given
Keywords :
MOS integrated circuits; carrier mobility; nanotechnology; silicon-on-insulator; substrates; IC performance; MOSFET current; SOI substrates; Smart Cut; advanced substrate engineering; device architecture; engineered substrates; mobility enhancing substrates; nanotechnology era; substrate design; CMOS technology; Conductivity; Design engineering; Dielectric materials; Dielectric substrates; Impedance; Isolation technology; Nanotechnology; Power engineering and energy; Production;
Conference_Titel :
VLSI Technology, Systems, and Applications, 2006 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
1-4244-0181-4
Electronic_ISBN :
1524-766X
DOI :
10.1109/VTSA.2006.251074