DocumentCode :
2722464
Title :
Characterization of the annealing behavior for copper-filled TSVs
Author :
Saettler, P. ; Boettcher, M. ; Wolter, K.-J.
Author_Institution :
Electron. Packaging Lab., Tech. Univ. Dresden, Dresden, Germany
fYear :
2012
fDate :
May 29 2012-June 1 2012
Firstpage :
619
Lastpage :
624
Abstract :
Herein we describe the annealing behavior of copper Through Silicon Vias (TSVs) in a series of experiments. Temperatures ranged from 150°C to 450°C and the dwell of the temperature varied between 30 min and 4 h. Copper protrusion, test samples warpage and the copper microstructure were examined in a subsequent characterization. Combining the results of these measurements enables the determination of an optimized temperature and dwell set, which avoids further protrusion and minimizes stress after annealing. Additionally, the data analysis shows a temperature- and dwell-dependency of copper protrusion and die warpage. Electron backscatter diffraction (EBSD) measurements on TSV cross sections show changes of the micro structure. Hence it could be verified that copper underwent grain growth during annealing. The described investigations represent a new systematic approach for the characterization of the copper annealing behavior in TSVs. The evaluation of the specific experiments and the comparison between different annealing conditions enable insights into the structural changes of the material during the annealing process. With help of the implemented characterization this approach succeeds in giving optimized settings for the TSV annealing process. Based on the measurement data it is possible to choose a suitable temperature and dwell process set depending on subsequent redirection layer (RDL) processing steps. Furthermore a model for the annealing procedure in TSVs is derived from the measurement results.
Keywords :
annealing; copper; crystal microstructure; three-dimensional integrated circuits; EBSD measurements; RDL processing steps; TSV annealing process; annealing behavior characterization; copper microstructure; copper protrusion dwell-dependency; copper protrusion temperature-dependency; copper-filled TSV; copper-filled through silicon vias; data analysis; die warpage dwell-dependency; die warpage temperature-dependency; dwell set; electron backscatter diffraction measurements; grain growth; optimized temperature; redirection layer processing steps; temperature 150 degC to 450 degC; test sample warpage; time 30 min; time 4 h; Annealing; Copper; Materials; Microstructure; Stress; Temperature measurement; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location :
San Diego, CA
ISSN :
0569-5503
Print_ISBN :
978-1-4673-1966-9
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2012.6248895
Filename :
6248895
Link To Document :
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