Author :
Mertens, Paul W. ; Vereecke, G. ; Vos, R. ; Arnauts, S. ; Barbagini, F. ; Bearda, T. ; DeGendt, S. ; Demaco, C. ; Eitoku, A. ; Frank, M. ; Fyen, W. ; Hall, L. ; Hellin, D. ; Holsteyns, F. ; Kesters, E. ; Claes, M. ; Kim, K. ; Kenis, K. ; Kraus, H. ; Hoyer
Abstract :
This study will review some of the critical aspects of cleaning for sub-65 nm technologies. These issues include: surface preparation for high k dielectrics on Si and on Ge, metal gate cleaning and removal of small particles without creating damage to structures
Keywords :
germanium alloys; high-k dielectric thin films; nanotechnology; silicon alloys; surface cleaning; Ge; Si; high k dielectrics; metal gate cleaning; nanotechnologies; surface preparation; Chemicals; Cleaning; Delay; Dielectric films; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Rough surfaces; Surface roughness; Surface treatment;
Conference_Titel :
VLSI Technology, Systems, and Applications, 2006 International Symposium on
