A language for describing boundary-scan devices

Author

Parker, Kenneth P. ; Oresjo, Stig

Author_Institution

Hewlett-Packard Co., Loveland, CO, USA

fYear

1990

fDate

10-14 Sep 1990

Firstpage

222

Lastpage

234

Abstract

It is pointed out that boundary-scan (IEEE Standard 1149.1-1990) technology is beginning to be embraced in chip and board designs. One key need is a way to describe simply and effectively the feature set of a boundary-scan compliant device in a manner both user friendly and suitable for software to utilize. A language subset of VHDL is proposed for this purpose. A derivative effect of the proposed language is that, if a device is not describable by the language, the device does not comply with the 1149.1 standard. Although the converse is not true, the language still allows a syntactic check for compliance as well as a number of semantic checks

Keywords

circuit CAD; circuit layout CAD; electronic engineering computing; high level languages; logic CAD; logic testing; specification languages; standards; IEEE Standard 1149.1-1990; PCB design; VHDL; boundary-scan devices; chip design; compliance; semantic checks; syntactic check; user friendly system; Application software; Electronics industry; Failure analysis; Hardware design languages; Instruments; Manufacturing; Proposals; Software tools; Testing; Very high speed integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1990. Proceedings., International

Conference_Location

Washington, DC

Print_ISBN

0-8186-9064-X

Type

conf

DOI

10.1109/TEST.1990.114021

Filename

114021