DocumentCode
2723003
Title
Enhanced barrier seed metallization for integration of high-density high aspect-ratio copper-filled 3D through-silicon via interconnects
Author
Civale, Yann ; Armini, Silvia ; Philipsen, Harold ; Redolfi, Augusto ; Velenis, Dimitrios ; Croes, Kristof ; Heylen, Nancy ; El-Mekki, Zaid ; Vandersmissen, Kevin ; Beyer, Gerald ; Swinnen, Bart ; Beyne, Eric
Author_Institution
IMEC, Leuven, Belgium
fYear
2012
fDate
May 29 2012-June 1 2012
Firstpage
822
Lastpage
826
Abstract
Higher performance, higher operation speed and volume shrinkage require high 3D interconnect densities. A way to meet the density specifications is to further increase the A.R. of the TSV interconnection. This requires the integration of highly conformal thin films deposition techniques in TSV flows, particularly for metallization. In this study, seed layer enhancement is applied to regular PVD Cu seed for metalizing TSV of diameter of 2μm and aspect-ratio 15:1. The results reported in this paper open a new path for process integration of high A.R. TSVs and provide a versatile and reliable building block for achieving the high density interconnects required for tomorrow´s 3D electronics devices.
Keywords
atomic layer deposition; integrated circuit interconnections; metallisation; 3D electronics devices; 3D interconnect densities; Cu; barrier seed metallization; copper filled 3D through silicon via interconnects; high aspect ratio; high density interconnects; operation speed; process integration; seed layer enhancement; size 2 mum; volume shrinkage; Filling; Integrated circuit interconnections; Metallization; Reliability; Silicon; Through-silicon vias; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4673-1966-9
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2012.6248928
Filename
6248928
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