I Models and Tools for the Dynamic Reconfiguration of FPGAs

This tutorial outline summarizes the tools and the methods that are used to bridge the design gap between the specification of a dynamically reconfigurable application and its implementation in a FPGA system. The tools and methods used when designing dynamically reconfigurable systems are influenced by the target application domain. In this tutorial, it is assumed that the application is an embedded processor system implemented in a single platform FPGA. Dynamic reconfiguration will be used to time-multiplex mutually exclusive sub-components in the system architecture that are used periodically. Simulating dynamically reconfigurable systems in RTL simulators has been investigated but RTL simulators normally do not allow the topology of the system architecture to change during simulation. ´Virtual multiplexors´, placed at subcomponent I/O interfaces, determine which sub-component receives input and generates output. A reconfiguration controller switches the virtual multiplexors according to a given reconfiguration schedule or algorithm. The design of a dynamical and partial hardware reconfigurable system is however still not sufficient supported by design tools. To accomplish this, the signal lines for communication with the functionality in the reconfigurable area must be placed at a known position, which can be done by using so called macros