Serial RapidlO: Benefiting System Interconnects

Legacy interconnect technology has proven to be deficient for the complex transactions that occur between system on chip (SoCs) devices in modern embedded systems. The intention of the new serial-based RapidIO interconnect, is to address the needs of embedded applications. This relatively new interconnect technology is poised to lead in this applications space. Embedded systems consist of multiple processing elements, which provide data processing and/or control functions. Some systems may have several thousands of devices that need to intercommunicate. This communication must be reliable, peer-to-peer, low latency, and bandwidth scalable. It must support a wide range of system topologies. Additionally, interconnect must be efficient in the areas of transaction, silicon, and software overhead. RapidIO had the benefit of being designed from the ground up. With this flexibility in mind, the specification targets embedded applications, with primary goals being reliability, efficiency, and protocol flexibility. RapidIO chose a three layered approach based in hardware. The lowest layer is the physical layer, which specifies electrical signaling and link level handshaking mechanisms. The transport layer sits above the physical layer and dictates how packets are routed in the switched environment. Finally, the logical layer is the highest layer which defines packet types and function