Title :
ASIC CAD system based on hierarchical design-for-testability
Author :
Emori, Michiaki ; Aikyo, Takashi ; Machida, Yasuhide ; Shikatani, Jun-Ichi
Author_Institution :
Fujitsu Ltd., Kawasaki, Japan
Abstract :
The authors propose a novel test CAD (computer-aided-design) system for ASIC (application-specific integrated circuits), including megacells which automatically insert high-testability logic. The strategy is to access megacells directly and independently. The overhead is only 2% to 3% of the total number of gates. With the proposed system, hierarchically designed logic data can be converted to high-testability logic. It is not necessary for the designers to have specialized knowledge about design-for-testability
Keywords :
application specific integrated circuits; automatic testing; circuit CAD; logic CAD; ASIC CAD; automatically insert high-testability logic; hierarchical design-for-testability; megacells; Application specific integrated circuits; Automatic logic units; Automatic testing; Circuit testing; Design automation; Integrated circuit testing; Logic circuits; Logic design; Logic testing; System testing;
Conference_Titel :
Test Conference, 1990. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-9064-X
DOI :
10.1109/TEST.1990.114048
