DocumentCode :
2723600
Title :
Diagnosis for wiring interconnects
Author :
Cheng, Wu-Tung ; Lewandowski, James L. ; Wu, Eleanor
Author_Institution :
ADAS Software Inc., San Jose, CA, USA
fYear :
1990
fDate :
10-14 Sep 1990
Firstpage :
565
Lastpage :
571
Abstract :
The authors address the problem of generating minimum test sets for diagnosing faults in wiring interconnects on printed circuit boards. It is assumed that all the nets can be accessed in parallel or through a boundary-scan chain on the board. The fault model includes multiple stuck-at and short faults. Three methods for three different diagnosis mechanisms are presented. It is also pointed out that the self-diagnosis problem is the same as the concurrent error detection problem for asymmetric errors. Thus, the diagnostic methods considered are similar to the coding methods used in concurrent error detection. All the diagnostic methods can be extended to structural tests by taking advantage of the geometry of a circuit board to produce an efficient test
Keywords :
built-in self test; electric connectors; error detection; printed circuit accessories; printed circuit testing; wiring; Vornoi diagram; asymmetric errors; boundary-scan chain; concurrent error detection; fault model; faults; graph colouring; multilayer boards; multiple short fault; multiple stuck-at fault; printed circuit boards; self-diagnosis; structural tests; wiring interconnects; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Integrated circuit interconnections; Printed circuits; Routing; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1990. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-9064-X
Type :
conf
DOI :
10.1109/TEST.1990.114069
Filename :
114069
Link To Document :
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